COMPSYS 303

Microcomputers and Embedded Systems

Summary


Semester

Semester 2, 2018

Staff

Contents


Calendar notes

Embedded applications. Microprocessors, microcontrollers, architecture, organisation, programming memories, I/O interfacing. Sensors, actuators, analog interfaces. Hardware/Software partitioning and interfacing. Concurrency. Implementing data transformations and reactivity. Case studies. Prerequisite: COMPSYS 202 or SOFTENG 251, and COMPSYS 201

Outcome mapping


Intended learning outcomes
Related graduate attributes
Related assessments

Introduction to embedded systems: Students will be able to distinguish an embedded system from a general purpose computing system and automation systems.

ENGA01: engineering knowledge (1)
UOA_1: Disciplinary Knowledge and Practice (2)

No related assessments

Requirements and specification: Students will be able to identify the concurrent components of the system. They will be able to model the control part using Finite State Machines (FSMs). They will be able to map the specification to C code and model complex control using the concurrency and hierarchy operators of Statecharts. They will be able to identify threads, synchronisation issues and race conditions. They will have ability to program a custom embedded system using the high-level language C and the model-driven approach using SCCharts.

ENGA01: engineering knowledge (1)
ENGA02: problem analysis (1)
ENGA03: design and solution development (3)
ENGA05: modern tool usage (2)
ENGK04: specialist knowledge (4)
UOA_1: Disciplinary Knowledge and Practice (2)
UOA_2: Critical Thinking (2)
UOA_3: Solution Seeking (2)

No related assessments

Custom processor design: The student will be able to express a specific embedded application as an algorithm. They will able to map the algorithm into a specific FSM called FSM with data path (FSMD). They will be able to then design a data path and transform the FSMD into an FSM using the data path features.

ENGA01: engineering knowledge (1)
ENGA02: problem analysis (1)
ENGA03: design and solution development (3)
ENGK04: specialist knowledge (4)
UOA_1: Disciplinary Knowledge and Practice (2)
UOA_2: Critical Thinking (2)
UOA_3: Solution Seeking (2)

No related assessments

Buses: The student will be able to identify the role of buses for interfacing master devices with slave devices. They will be able to understand the write timing diagrams to express the concurrent interaction of the devices connected to the bus. Also understand different bus arbitration mechanisms. They will be able to understand and design complex embedded devices using buses such as AMBa or Avalon. They will be able to design a processor-based embedded system integrating the NIOS2 processor and the Avalon bus.

ENGA01: engineering knowledge (1)
ENGA03: design and solution development (3)
UOA_1: Disciplinary Knowledge and Practice (2)
UOA_3: Solution Seeking (2)

No related assessments

Peripherals and interfacing: The student will be able to interface peripherals using both interrupts and polling mechanisms. They will be able to realize environment concurrency using interrupts. They will be able to write C code for interfacing with peripherals.

ENGA01: engineering knowledge (1)
ENGA03: design and solution development (3)
UOA_1: Disciplinary Knowledge and Practice (2)
UOA_3: Solution Seeking (2)

No related assessments

Industrial automation: Students will have understanding of networked embedded systems, industrial applications of embedded systems, PLCs as an alternative to microprocessors.

ENGA01: engineering knowledge (1)
ENGA03: design and solution development (3)
ENGK04: specialist knowledge (4)
UOA_1: Disciplinary Knowledge and Practice (2)
UOA_3: Solution Seeking (2)

No related assessments

Assessment


Coursework

No description given

Exam rules

Assignment 1 - 10%
Assignment 2 - 10%
Test- 10%
Final Exam - 70%

Inclusive learning

Students are urged to discuss privately any impairment-related requirements face-to-face and/or in written form with the course convenor/lecturer and/or tutor.

Other assessment rules

No description given

Academic integrity

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