Digital Circuit Design
Semester 2, 2018
Staff
Calendar notes
Fundamental concepts in the design of combinational and sequential logic circuits. Modern approach to design using CAD tools that exploit the advantage of automation. Students will be exposed to the use of FPGA to rapid prototype digital systems using schematic and hardware description language entries. Prerequisite: 15 points from ELECTENG 101, 208, MECHENG 201
Intended learning outcomes |
Related graduate attributes |
Related assessments |
|---|---|---|
Combinational and sequential logic circuit design: The student will be able to synthesize the required circuit based on the given requirements. They will be able to apply the design into a programmable logic device and then analyse and evaluate the performance and operation of the circuit. |
ENGA01: engineering knowledge (2) ENGA02: problem analysis (5) ENGA03: design and solution development (5) ENGA04: investigation (2) ENGA09: individual and team work (3) ENGK03: abstraction and formulation (1) ENGK04: specialist knowledge (5) ENGK05: engineering design (2) ENGP01: depth of knowledge required (3) ENGP03: depth of analysis required (4) ENGP07: interdependence (3) UOA_2: Critical Thinking (1) UOA_3: Solution Seeking (3) |
No related assessments |
Verilog HDL: The student will be able to use Quartus II as a design tool to enter the digital design using Verilog HDL entry. They will be able to simulate the Verilog HDL entry against design requirements and synthesize the design and test the performance in a FPGA. |
ENGA01: engineering knowledge (2) ENGA02: problem analysis (5) ENGA03: design and solution development (5) ENGA04: investigation (2) ENGA05: modern tool usage (4) ENGA09: individual and team work (3) ENGA12: lifelong learning (3) ENGK03: abstraction and formulation (1) ENGK04: specialist knowledge (5) ENGK05: engineering design (2) UOA_1: Disciplinary Knowledge and Practice (0) UOA_3: Solution Seeking (3) |
No related assessments |
Finite state machine design: Use of Quartus II to enter the design using Verilog HDL. Analyse the entered design using the simulation features of Quartus II, synthesize the design and evaluate the design into a targetted FPGA. |
ENGA01: engineering knowledge (2) ENGA02: problem analysis (5) ENGA03: design and solution development (5) ENGA04: investigation (2) ENGA09: individual and team work (3) ENGA12: lifelong learning (3) ENGK03: abstraction and formulation (1) ENGK04: specialist knowledge (5) ENGK05: engineering design (2) ENGP01: depth of knowledge required (3) ENGP03: depth of analysis required (4) ENGP07: interdependence (3) UOA_2: Critical Thinking (1) UOA_3: Solution Seeking (3) |
No related assessments |
Coursework
No description given
Exam rules
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Inclusive learning
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Other assessment rules
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